Product Details:
|
Part Number: | EPM570T144I5N | Operating Supply Voltage:: | 2.5 V, 3.3 V |
---|---|---|---|
Number Of Macrocells:: | 440 Macrocell | Number Of I/Os:: | 116 I/O |
Minimum Operating Temperature:: | - 40 C | Maximum Operating Temperature:: | + 85 C |
EPM570T144I5N Field Programmable Gate Array MAX II Complex Programmable Logic Devices TQFP-144
Product Description Of EPM570T144I5N
EPM570T144I5N is instant-on, non-volatile MAX® II CPLDs is based on a 0.18-µm, 6-layer-metal-flash process, with densities from 240 to 2,210 logic elements (LEs) (128 to 2,210 equivalent macrocells) and non-volatile storage of 8 Kbits. MAX II devices offer high I/O counts, fast performance, and reliable fitting versus other CPLD architectures. Featuring MultiVolt core, a user flash memory (UFM) block, and enhanced in-system programmability (ISP), MAX II devices are designed to reduce cost and power while providing programmable solutions for applications such as bus bridging, I/O expansion, power-on reset (POR) and sequencing control, and device configuration control.
Specification Of EPM570T144I5N
|
2.5 V, 3.3 V |
|
440 Macrocell |
|
116 I/O |
|
- 40 C |
|
+ 85 C |
|
304 MHz |
|
5.4 ns |
Number of Logic Array Blocks - LABs: |
57 |
Number of Logic Elements: |
570 |
Operating Supply Current: |
55 mA |
Supply Voltage - Max: |
3.6 V |
Supply Voltage - Min: |
2.375 V |
Total Memory: |
8192 bit |
Unit Weight: |
1.100 g |
Feature Of EPM570T144I5N
Low-cost, low-power CPLD
Instant-on, non-volatile architecture
Standby current as low as 25 µA
Provides fast propagation delay and clock-to-output times
Provides four global clocks with two clocks available per logic array block (LAB)
UFM block up to 8 Kbits for non-volatile storage
MultiVolt core enabling external supply voltages to the device of either 3.3 V/2.5 V or 1.8 V
MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, and 1.5-V logic levels
Bus-friendly architecture including programmable slew rate, drive strength,
bus-hold, and programmable pull-up resistors
Schmitt triggers enabling noise tolerant inputs (programmable per pin)
I/Os are fully compliant with the Peripheral Component Interconnect Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2 for 3.3-V operation at 66 MHz
Supports hot-socketing
Built-in Joint Test Action Group (JTAG) boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1-1990
ISP circuitry compliant with IEEE Std. 1532
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FAQ
Q. Are your products original?
A: Yes, all products are original, new original import is our purpose.
Q:Which Certificates do you have?
A:We are ISO 9001:2015 Certified Company and member of ERAI.
Q:Can you support small quantity order or sample?Is the sample free?
A:Yes,we support sample order and small order.Sample cost is different according to your order or project.
Q:How to ship my order? Is it safe?
A:We use express to ship,such as DHL,Fedex,UPS,TNT,EMS.We can also use your suggested forwarder.Products will be in good packing and ensure the safety and we are responsible to product damage to your order.
Q:What about the lead time?
A:We can ship stock parts within 5 working days.If without stock,we will confirm lead time for you based on your order quantity.
Contact Person: Sales Manager
Tel: 86-13410018555
Fax: 86-0755-83957753