STM32MP255AAK3 [STM32 Arm Cortex MPUs]: ST High-Performance 32-Bit Microprocessor IC
STM32MP255AAK3 is based on the high-performance single or dual-core Arm® Cortex®-A35 64-bit RISC core operating at up to 1.5 GHz. The Cortex®‑A35 processor includes a 32-Kbyte L1 instruction cache for each CPU, a 32-Kbyte L1 data cache for each CPU, and a 512-Kbyte L2 cache. The Cortex®‑A35 processor uses a highly efficient 8-stage in-order pipeline that has been extensively optimized to provide full Armv8-A features while maximizing area and power efficiency.
STM32MP255AAK3 also embed a Cortex®-M33 32-bit RISC core operating at up to 400 MHz frequency. The Cortex®-M33 core features a floating point unit (FPU) single precision which supports Arm® single-precision data-processing instructions, and data types. The Cortex®-M33 supports a full set of DSP instructions, TrustZone®, and a memory protection unit (MPU) which enhances application security.
STM32MP255AAK3 also embed a Cortex®-M0+ 32-bit RISC core operating at up to 200 MHz frequency (16 MHz when running from backup regulator). This processor is located in the SmartRun domain, and can be used to ensure very-low-power peripheral activity when all other processors and domains are stopped.
STM32MP255AAK3 can also embed a 3D graphic processing unit (VeriSilicon®, OpenGL ES 3.1, Vulkan 1.3, OpenCL 3.0, OpenVX 1.3) running at up to 900 MHz, with performances up to 150 Mtriangle/s, 900 Mpixel/s.
The graphic processing unit can provide a neural processor unit (VeriSilicon®, TensorFlowLite, ONNX, Linux NN) running at up to 900 MHz.
STM32MP25xA/D devices provide an external SDRAM interface supporting external memories up to 32‑Gbit density (4 Gbytes), 16- or 32-bit DDR3L up to 1066 MHz, 16- or 32-bit LPDDR4 or DDR4 up to 1200 MHz.
STM32MP255AAK3 incorporate high-speed embedded memories: 808 Kbytes of internal SRAM (including 256-Kbyte AXI SYSRAM, 128-Kbyte AXI video SRAM (which can be used as general purpose), two banks of 128 Kbytes each of AHB SRAM, three banks of 8, 8, and 16 Kbytes of AHB SRAM in SmartRun domain, 128 Kbytes of AHB SRAM in backup domain, and 8 Kbytes of SRAM in backup domain), as well as an extensive range of enhanced I/Os and peripherals connected to APB buses, AHB buses, a 32-bit multi-AHB bus matrix, and a 128/64-bit multi-layer AXI interconnect supporting access to internal and external memories.
Each device offers three ADCs, a low-power secure RTC, 12 general-purpose 16-bit timers, 4 general-purpose 32‑bit timers, three PWM timers for motor control, five low-power timers, and a true random number generator (RNG).
STM32MP255AAK3 offer a video encoder and a video decoder. The devices support 8 multi-function digital filters (MDF), and one dedicated audio-digital filter with sound-activity detection (ADF). The devices feature the following standard and advanced communication interfaces.
Specification Of STM32MP255AAK3
Core Processor
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ARM® Cortex®-A35, ARM® Cortex®-M0+, ARM® Cortex®-M33
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Number of Cores/Bus Width
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2, 1, 1 Core, 32-Bit
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Speed
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1.2GHz
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Co-Processors/DSP
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GPU
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RAM Controllers
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DDR3L, DDR4, LPDDR4
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Graphics Acceleration
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Yes
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Display & Interface Controllers
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LCD, LVDS, MIPI-CSI2
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Ethernet
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10/100/1000Mbps (3)
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USB
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USB 2.0 (1), USB 3.0 (1), USB Type-C (1)
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Voltage - I/O
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1.8V, 3.3V
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Operating Temperature
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-40°C ~ 125°C (TJ)
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Security Features
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ARM TZ, Boot Security, TRNG
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Mounting Type
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Surface Mount
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Package / Case
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424-VFBGA
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Supplier Device Package
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424-VFBGA (14x14)
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Additional Interfaces
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GPIO, DMA, CANbus, I2C, MMC/SD/SDIO, SPDIF, SPI, UART/USART
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STM32MP255AAK3: Standard peripherals
- eight I2Cs
- four I3Cs
- four USARTs and five UARTs
- one low-power UART
- eight SPIs, three I2Ss full-duplex master/slave. The I2S peripherals can be clocked via a dedicated internal audio PLL or via an external clock.
- four SAI serial audio interfaces
- one SPDIF Rx interface
- three SDMMC interfaces
- an USB 2.0 Host with embedded Hi-Speed PHY
- an USB 2.0/3.0 dual-role data with both Hi-Speed and 5Gbits/s SuperSpeed PHYs
- three FDCAN interfaces, including one supporting TTCAN mode (optional)
- two Gigabit Ethernet Interface, with TSN support (optional)
- one Gigabit Ethernet Switch connected to ETH1 and providing two external PHY interfaces, with TSN support (optional)
STM32MP255AAK3: Advanced peripherals including
- a flexible memory control (FMC) interface
- two Octo-SPI flash memory interface
- two camera interfaces for CMOS sensors, one with basic ISP, demosaicing and parallel or MIPI CSI interface
- an LCD-TFT display interface
- a MIPI DSI display interface (optional)
- an LVDS display interface (optional)
A comprehensive set of power-saving mode allows the design of low-power applications.
STM32MP255AAK3 is proposed in various packages up to 436 balls with 0.5 mm to 0.8 mm pitch. The set of included peripherals can change with the selected device.
These features make STM32MP255AAK3 suitable for a wide range of consumer, industrial, white goods and medical applications.
Company URL: https://www.integrated-ic.com/
FAQ
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Q:What about the lead time?
A:We can ship stock parts within 5 working days.If without stock,we will confirm lead time for you based on your order quantity.
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