company blog about Supply Broadcom StrataXGS® Switch Solutions:Tomahawk Ultra,Tomahawk 6,Tomahawk 5,Tomahawk4

Supply Broadcom StrataXGS® Switch Solutions:Tomahawk Ultra,Tomahawk 6,Tomahawk 5,Tomahawk4

Shenzhen Mingjiada Electronics Co., Ltd. is a renowned distributor of electronic components. Adhering to the principle of ‘serving and benefiting our customers’, we offer a comprehensive range of high-quality electronic components.

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I. Solution Overview: Positioning of the Tomahawk Product Line

Broadcom’s StrataXGS® Tomahawk is a flagship family of high-performance switching ASICs designed for hyperscale cloud data centres, large-scale AI model clusters, high-performance computing (HPC) and distributed storage. It features ultra-high switching capacity, high-density high-speed ports, lossless RoCE, hardware-level AI traffic optimisation and a unified software ecosystem, comprehensively covering four major scenarios ranging from 400G foundational cloud, 800G at scale for AI, 1.6T hyperscale computing clusters, to ultra-low-latency tightly-coupled HPC. It comprises four generations of flagship chips: Tomahawk 4, Tomahawk 5, Tomahawk 6, Tomahawk Ultra. This forms a comprehensive product matrix characterised by progressive bandwidth scaling and scenario-specific differentiation. The entire series is compatible with SONiC and the Broadcom SDK, enabling seamless hardware and software iterations and significantly reducing development costs for equipment manufacturers and operational costs for cloud providers.

Core logical architecture of the Tomahawk series:

Tomahawk 4: 25.6 Tbps; the scalable cloud foundation for the 400G era and the mainstream upgrade solution for existing data centres

Tomahawk 5: 51.2 Tbps, the standard chip for 800G AI scale-out clusters

Tomahawk 6: 102.4 Tbps, a 1.6 T ultra-large-scale fabric supporting AI training and inference with over 10,000 cards

Tomahawk Ultra: 51.2 Tbps, dedicated to ultra-low latency, designed for HPC and tightly-coupled scale-up computing clusters

II. Core Specifications, Architecture and Solution Advantages of Each Generation

1. Tomahawk 4 (BCM57750 series, 25.6 Tbps)

Basic Hardware Parameters

Process: 7 nm

Total Switching Capacity: 25.6 Tbps

SerDes: 512 channels of 50G PAM4, flexible port configurations: 64×400GbE / 128×200GbE / 256×100GbE

Shared buffer architecture, lossless optimisation for RoCEv2, 5× congestion absorption capacity, significantly reducing packet loss due to ingress congestion.

Key Technical Features

Standardised 400G Cloud Data Centre Platform

First-generation, at-scale support for 400GbE, compatible with cloud providers’ spine-leaf architectures, for use in top-of-rack (ToR), spine and distributed storage gateways; supports virtualisation, single-path line-rate VxLAN routing, and NVMe storage pooling deployments.

Mature, Lossless Ethernet Ecosystem

Hardware-level ECMP adaptive load balancing, high-precision PTP / synchronised Ethernet, and Broadview Gen3 in-band telemetry, supporting large-scale RDMA storage and light AI training clusters.

CPO Pre-compatibility and Low-Power Design

Power consumption reduced by 75% compared to multi-chip solutions; supports early co-packaged optical validation; serves as the primary chip for low-cost capacity expansion in existing IDCs.

Typical Deployment Scenarios

400G upgrades for public cloud and large-scale government and enterprise data centres

Small and medium-sized AI training clusters, distributed block storage / object storage networks

Telecom operator cloud and edge computing aggregation switches

2. Tomahawk 5 (BCM78900 series, 51.2 Tbps)

Basic Hardware Specifications

Process: 5nm monolithic process

Total Switching Capacity: 51.2 Tbps

SerDes: 512 channels of 106G Peregrine PAM4; port configurations: 64×800GbE / 128×400GbE / 256×200GbE

On-board 6-core ARM embedded processor with hardware-based streaming telemetry and real-time traffic statistics aggregation.

Key Technical Features

AI Scale-Out Standard Platform

Designed specifically for GPU/XPU clusters at the thousand-card scale, featuring built-in congestion control dedicated to AI streams, adaptive routing and fine-grained flow scheduling. This addresses the challenges of massive numbers of small streams and high-concurrency enqueueing during large-model training, whilst delivering a significant performance improvement over RoCEv2.

Native Support for 800G High-Density Ports

A single chip supporting 64 x 800G ports significantly reduces the number of switches required, minimising data centre cabling and rack space, whilst long-distance PAM4 copper cables lower the TCO of optical modules.

End-to-End High-Precision Timing and Programmable Forwarding

Full L2/L3 at line speed, tunnel encapsulation, traffic shaping and security ACLs support large-scale multi-tenant isolation; high-precision synchronised clocking is optimised for AI and low-latency financial trading scenarios.

Software Forward Compatibility with Tomahawk 4

Customers can migrate rapidly using existing SDK/SONiC code, whilst hardware pin compatibility simplifies the transition to the second-generation switch platform.

Typical Deployment Scenarios

Medium-to-large-scale general-purpose large-model training clusters, autonomous driving simulation computing power

800G next-generation cloud data centre spine-leaf backbone switches

Large-scale distributed AI inference and offline computing clusters

3. Tomahawk 6 (102.4 Tbps, 1.6 T ultra-bandwidth flagship)

Basic Hardware Specifications

Switching capacity: 102.4 Tbps (Bandwidth ceiling for the Tomahawk series)

SerDes: 1,024 channels of 200G next-generation PAM4 SerDes

Port configuration: 64 × 1.6 TbE / 512 × 200 GbE / 1,024 × 100 GbE, with native support for CPO (Common Package Optics) solutions.

Core Technical Features

Ultra-large-scale AI fabric supporting from 10,000 to 1 million XPUs

Equipped with the Cognitive Routing 2.0 engine, featuring global dynamic load balancing, packet pruning and millisecond-level fault detection, optimised for high-bandwidth AI workloads such as MoE hybrid expert models, reinforcement learning and ultra-large-scale pre-training.

Native support for 1.6T ultra-high-speed ports

64 x 1.6Tbps interfaces on a single chip, enabling the construction of a flat, tier-free AI network that significantly reduces data round-trip latency between computing nodes, making it suitable for next-generation supercomputing-class AI clusters.

CPO Deep Optimisation, Ultimate Energy Efficiency

The co-packaged optical integration solution reduces power consumption in optical interconnects and minimises link jitter, resolving the challenges of optical module deployment density, thermal management and cabling in ultra-large clusters; it represents the standard architecture for future AI data centres.

Unified Computing-Network Convergence

A single network simultaneously supports training, inference and storage workloads, enabling dynamic scheduling of computing resource pools and facilitating high-speed east-west interconnections between GPUs, CPUs and DPUs.

Typical Deployment Scenarios

Ultra-large-scale general-purpose AI large-model training clusters (100,000-card scale)

High-speed backbone switches for supercomputing centres and national-level computing hubs

Next-generation data centre core switching nodes utilising CPO co-packaged optics

4. Tomahawk Ultra (51.2 Tbps ultra-low-latency HPC-specific chip)

Basic Hardware Specifications

Switching capacity: 51.2 Tbps, matching the bandwidth of Tomahawk 5, with a completely re-engineered architecture

Ultra-low forwarding latency: as low as 250 ns, supporting full-line-rate forwarding of 64B minimum packets

Pin-compatible with Tomahawk 5, enabling seamless replacement and upgrade of the entire platform.

Key Technical Features

Designed specifically for tightly coupled Scale-Up HPC/AI

Unlike Tomahawk 5 and 6, which prioritise ultra-high bandwidth and horizontal scaling, the Ultra architecture’s core objectives are ultra-low latency, lossless and congestion-free operation. It features built-in hardware acceleration for in-network collectives, significantly reducing the communication overhead of distributed training operations such as AllReduce and AllGather.

Lossless Ethernet at the Layer 1 level

Topology-aware forwarding, fine-grained congestion control and a zero-packet-loss, lossless fabric address the latency jitter issues associated with traditional Ethernet in tightly-coupled computing scenarios. Performance rivals that of InfiniBand, whilst retaining the universality of the Ethernet ecosystem.

Full Interoperability Across Software and Hardware Ecosystems

By reusing the StrataXGS unified SDK and the SONiC open-source switch system, and integrating the operations and maintenance toolchain with Tomahawk 5/6, there is no need to rebuild the software stack separately for HPC scenarios.

Typical Deployment Scenarios

High-Performance Computing (HPC), meteorological simulation, fluid dynamics and molecular simulation clusters

Ultra-tightly coupled, high-density GPU scale-up single-rack computing clusters

Research-grade AI training platforms with zero tolerance for latency jitter