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Supply Microchip High Performance A3P250-FGG256I Low Power Programmable Logic IC
Product Description
A3P250-FGG256I devices have up to 1 million system gates,supported with up to 144 kbits of true dual-port SRAM and up to 300 user I/Os.
Feature
700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above)
1.5V, 1.8V, 2.5V, and 3.3V Mixed-Voltage Operation
Wide Range Power Supply Voltage Support per JESD8-B, Allowing I/Os to Operate from 2.7V to 3.6V
Bank-Selectable I/O Voltages—up to 4 Banks per Chip
Single-Ended I/O Standards: LVTTL, LVCMOS 3.3V/2.5V/1.8V/1.5V, 3.3V PCI/3.3V PCI-X, and LVCMOS 2.5V/5.0V Input
Differential I/O Standards: LVPECL, LVDS, B-LVDS, and M-LVDS
I/O Registers on Input, Output, and Enable Paths
Hot-Swappable and Cold Sparing I/Os
Supported only by A3P030 devices.
Programmable Output Slew Rate and Drive Strength
Weak Pull-Up/-Down
IEEE 1149.1 (JTAG) Boundary Scan Test
Pin-Compatible Packages across the ProASIC 3 Family