Memory IC Chip MT62F3G32D8DV-023 WT:C 96Gbit SDRAM LPDDR5 Memory Chip LFBGA-315

Memory IC Chip MT62F3G32D8DV-023 WT:C 96Gbit SDRAM LPDDR5 Memory Chip LFBGA-315​

Product Description Of MT62F3G32D8DV-023 WT:C

MT62F3G32D8DV-023 WT:C 96Gbit Synchronous Dynamic Random Access Memory with LVSTL Interface, package is 315-LFBGA (12.4x15).

Specification Of MT62F3G32D8DV-023 WT:C

Features Of MT62F3G32D8DV-023 WT:C

• Architecture
– 17.1 GB/s maximum bandwidth per channel
– Frequency range: 1067–5 MHz (data rate range per pin: 8533–40 Mb/s with WCK:CK = 4:1)
– Selectable CKR (WCK:CK = 2:1 or 4:1)
• LPDDR5X data interface
– Single x16 channel/die
– Double-data-rate command/address entry
– Differential command clocks (CK_t/CK_c) for high-speed operation
– Differential data clocks (WCK_t/WCK_c)
– Optional differential read strobe (RDQS_t/RDQS_c)
– 16n-bit or 32n-bit prefetch architecture
– Command-selectable burst lengths (BL = 16 or 32) in bank group or 16-bank modes
– Background ZQ calibration/command-based ZQ calibration
– Optional link protection (link ECC)
– Partial-array self refresh (PASR) and partial-array auto refresh (PAAR) with segment mask
• Ultra-low-voltage core and I/O power supplies
– VDD1 = 1.70–1.95V; 1.80V TYP
– VDD2H = 1.01–1.12V; 1.05V TYP
– VDD2L = VDD2H or 0.87–0.97V; 0.90V TYP
– VDDQ = 0.50V or 0.45V1 TYP; 0.30V TYP (ODT off only)
• I/O characteristics
– Interface-LVSTL 0.5/0.3
– I/O type: Low-swing single-ended, VSS terminated
– VOH-compensated output drive
– Programmable VSS on-die termination (ODT)
– Non target ODT support
– DVFSQ support
• Low power features
– DVFSC: Dynamic voltage frequency scaling core
– Single-ended CK, single-ended WCK and single-ended RDQS
– Data copy
– Write X

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Q:What about the lead time?
A:We can ship stock parts within 5 working days.If without stock,we will confirm lead time for you based on your order quantity.