5M80ZT100I5N Field Programmable Gate Array 7.5ns MAX V Complex Programmable Logic Devices

5M80ZT100I5N Field Programmable Gate Array 7.5ns MAX V Complex Programmable Logic Devices

Product Description Of 5M80ZT100I5N

5M80ZT100I5N is MAX® V Complex Programmable Logic Devices IC. The MAX V devices feature on-chip flash storage, internal oscillator, and memory functionality. With up to 50% lower total power versus other CPLDs and requiring as few as one power supply, MAX V CPLDs can help you meet your low power design requirement.

Specification Of 5M80ZT100I5N

Features Of 5M80ZT100I5N

The following list summarizes the MAX V device family features:
Low-cost, low-power, and non-volatile CPLD architecture
Instant-on (0.5 ms or less) configuration time
Standby current as low as 25 µA and fast power-down/reset operation
Fast propagation delay and clock-to-output times
Internal oscillator
Emulated RSDS output support with a data rate of up to 200 Mbps
Emulated LVDS output support with a data rate of up to 304 Mbps
Four global clocks with two clocks available per logic array block (LAB)
User flash memory block up to 8 Kbits for non-volatile storage with up to 1000 read/write cycles
Single 1.8V external supply for device core
MultiVolt I/O interface supporting 3.3V, 2.5V, 1.8V, 1.5V, and 1.2V logic levels
Bus-friendly architecture including programmable slew rate, drive strength, bus-hold, and programmable pull-up resistors
Schmitt triggers enabling noise tolerant inputs (programmable per pin)
I/Os are fully compliant with the PCI-SIG® PCI Local Bus Specification, revision 2.2 for 3.3V operation
Hot-socket compliant
Built-in JTAG BST circuitry compliant with IEEE Std. 1149.1-1990

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