IMX06A-AJ1R-J 50.3 Mega-pixel CMOS Image Sensor with Back-illuminated Stacked CMOS and Quad Bayer Coding

IMX06A-AJ1R-J is a diagonal 16.384 mm (Type 1/0.98) 50.3 Mega-pixel CMOS active pixel type stacked image sensor with a square pixel array. It adopts Sony's back-illuminated and stacked CMOS image sensor technology to achieve high-speed image capturing through column parallel A/D converter circuits, delivering high sensitivity and low noise images compared with conventional CMOS image sensors. The sensor employs R, G, and B pigment primary color mosaic filter and operates with four power supply voltages: analog 2.9 V/1.8 V, digital 0.83 V and 1.8 V or 1.2 V for input/output interface, ensuring low power consumption.

• Image size: Diagonal 16.384 mm (Type 1/0.98)
• Number of active pixels: 8192 (H) × 6144 (V) Approx. 50.33 M pixels
• Unit cell size: 1.60 μm (H) × 1.60 μm (V)
• Package: 234 pin LGA 23.0 mm (H) × 20.0 mm (V)

• Back-illuminated and stacked CMOS image sensor
• Quad Bayer Coding color filter arrangement
• Dual PD (Photo Diode)
• High Frame Rate
• C-PHY version: Full resolution (Bayer)@30 frames/s
• D-PHY version: Full resolution (Bayer)@15 frames/s
• High signal to noise ratio (SNR)
• Built-in 2D Dynamic Defect Pixel Correction (DPC)
• Built-in temperature sensor
• Output video format of RAW10, RAW12, RAW14
• QBC Re-mosaic function
• Two PLLs for independent clock generation for pixel control and data output interface
• CSI-2 serial data output
• MIPI D-PHY 2 lane / 4 lane, Max. 4.5 Gbps/lane, D-PHY specification version 2.1 compliant
• MIPI C-PHY 2/3 trio, Max. 6.0 Gsps/trio, C-PHY specification version 2.0 compliant
• 2-wire serial communication (Supports I2C "Fast mode", "Fast-mode Plus", and I3C)
• Dual Conversion Gain HDR (DCG-HDR) function: 4x2 Adjacent Pixel Binning DCG-HDR
• Quad Bayer Coding HDR (QBC HDR) function: Diagonal Binning QBC HDR
• 4.0 kbit of OTP ROM for users