8T39210NLGI 1.5GHz Differential To Differential Clock Fanout Buffer IC Chip with 3:11 Ratio

8T39210 is a high-performance clock fanout buffer designed for signal distribution of high-frequency, low phase-noise clock and data signals. The input clock can be selected from two differential inputs or one crystal input, with the internal oscillator circuit automatically disabled when crystal input is not selected.

The selected signal is distributed to ten differential outputs configurable as LVPECL, LVDS, or HSCL outputs, plus one LVCMOS output. All outputs can be disabled into a high-impedance state and maintain defined levels when inputs are open or tied to ground. The device operates from 3.3V or 2.5V core and output power supplies.

• Two differential reference clock input pairs
• Differential input pairs accept LVPECL, LVDS, HCSL, HSTL, or single-ended levels
• Crystal input accepts 10MHz to 40MHz crystal or single-ended clock
• Maximum Output Frequency: LVPECL - 1.5GHz, LVDS - 1.5GHz, HCSL - 250MHz, LVCMOS - 250MHz
• Two banks, each with five differential output pairs configurable as LVPECL, LVDS, or HCSL
• One single-ended reference output with synchronous enable to avoid clock glitch
• Output skew: 81ps (maximum), Bank A and Bank B at same output level
• Part-to-part skew: 200ps (typical)
• Additive RMS phase jitter at 156.25MHz: 37.6fs RMS (12kHz-20MHz), typical at 3.3V/3.3V
• Supply voltage modes: VDD/VDDO - 3.3V/3.3V, 3.3V/2.5V, 2.5V/2.5V
• -40°C to 85°C ambient operating temperature
• 7mm × 7mm 48-VFQFPN lead-free (RoHS 6) packaging